This invention relates to the automatic testing of high frequency or high speed printed digital circuit boards and of components mounted on such boards, and more particularly to a matched impedance translator fixture used to translate test signals from a test analyzer to such circuit boards or components.
Automatic test equipment for checking printed circuit boards has long involved use of a xe2x80x9cbed of nailsxe2x80x9d test fixture or interconnect in which the circuit board is mounted during testing. This test fixture includes a large number of nail-like spring-loaded test probes arranged to make electrical contact under spring pressure with designated test points on the circuit board under test, also referred to as the unit under test or xe2x80x9cUUT.xe2x80x9d Any particular circuit laid out on a printed circuit board is likely to be different from other circuits, and consequently, the bed of nails arrangement for contacting test points in the board must be customized for that particular circuit board. When the circuit to be tested is designed, a pattern of test points to be used in checking is selected, and a corresponding array of test probes is configured in the test fixture. This typically involves drilling a pattern of holes in a probe plate to match the customized array of test probes and then mounting the test probes in the drilled holes on the probe plate forming a compliant test interface or probe field. The circuit board is then mounted in the fixture superimposed on the array of test probes. During testing, the spring-loaded probes are brought into spring-pressure contact with the test points on the circuit board under test. Electrical test signals are then transferred from the board to the test probes and then to the exterior of the fixture for communication with a high speed electronic test analyzer which detects continuity or lack of continuity between various test points in the circuits on the board.
A typical class of test fixtures is the so called xe2x80x9cgrid typexe2x80x9d class of test fixtures in which the random pattern of test points on the board are contacted by translator pins which transfer test signals to interface pins arranged in a grid pattern in a receiver. A typical grid fixture includes a grid type of compliant test interface or probe field which typically includes equidistantly spaced openings forming a predetermined pattern. This type of compliant test interface because of its predetermined pattern of openings forming a grid is commonly referred to as a grid or grid base. The grid-type test fixture contains test electronics with a huge number of switches connecting test probes fitted in the grid base openings to corresponding test circuits in the electronic test analyzer. In one embodiment of a grid tester as many as 40,000 switches are used. When testing a bare board on such a tester, a translator fixture supports translator pins that communicate between a grid pattern of test probes in a grid base and an off-grid pattern of test points on the board under test. In one prior art grid fixture so-called xe2x80x9ctilt pinsxe2x80x9d are used as the translator pins. The tilt pins are straight solid pins mounted in corresponding pre-drilled holes in translator plates which are part of the translator fixture. The tilt pins can tilt in various orientations to translate separate test signals from the off-grid random pattern of test points on the UUT to the grid pattern of test probes in the grid base.
Other types of test fixtures include test fixtures that are not of the xe2x80x9cgrid type.xe2x80x9d These fixtures incorporate a compliant test interface having openings in pattern different from the standard grid patterns. For example, the openings may not be equidistantly or uniformly spaced forming xe2x80x9coff-grid patterns.xe2x80x9d Tilt pins are used with these fixtures to translate the test signals from the off-grid pattern on the compliant test interface to the off-grid pattern on the UUT. The off-grid pattern on the UUT is different from the off-grid pattern on the compliant test interface. Typically, the spacing between test points on the UUT may be shorter than the spacing between corresponding probes on the compliant test interface.
A recent approach uses a translator pin retention system for a translator fixture for a printed circuit board tester having a pattern of test probes facing away from a base plate upon which the translator fixture is mounted. The fixture comprises a plurality of essentially parallel and spaced apart translator plates having patterns of preformed holes for containing and supporting translator pins extending through the plates of the translator fixture for use in translating test signals between test points on a printed circuit board supported by the fixture and the probes on the base of the tester. A thin, flexible pin retention sheet comprising an elastomeric material is positioned above a surface of one of the translator plates so that the translator pins carried by the translator fixture extend through the pin retention sheet. The elastomeric pin retention sheet naturally applies a compression force around the translator pins. This compression force retains the pins in the fixture when the fixture is lifted or turned upside down. The compression force acting on the pins allows the pins to move with the retention sheet independently of the other pins and the translator plates of the fixture. This essentially avoids drag forces or any restriction to compliant axial movement of the pins within the fixture. Such a pin retention sheet is described, for example, in U.S. Pat. No. 5,493,230, which is incorporated herein by this reference.
Testing of high frequency or high speed digital UUTs requires that the impedance of the test source (i.e., the test source providing the electrical signals) is matched to the impedance of the load (i.e., the UUT) in order to avoid attenuation of the high frequency signals. Moreover, the impedance of the interconnect between the UUT and test analyzer must also be matched to the impedance of the source and to the impedance of the load. The problem with present translator fixtures incorporating pins is that the characteristic impedance of the pins may vary from pin to pin. Such impedance variation is caused by the variance in the spacings between a set of two pins (i.e., a signal pin and a ground pin) used to test a set of test points. This variance is caused by the fact that the spacing between sets of test points to be tested on the UUT is different than the spacing between corresponding probes on the compliant test interface. In essence, each set of pins forms a capacitor with the air being the capacitor""s dielectric. Since the spacing of one set of pins may vary from the spacing another set of pins, so does the capacitance between each set and hence the impedance of the pins of each set. As such, current translator fixtures incorporating pins are not suited for testing high frequency or high speed UUTs.
Currently, high frequency or high speed digital UUTs, such as digital circuit boards, digital circuit boards with mounted components, or individual components are typically tested using test sockets. Typically, short spring probes are fitted in cavities formed through the thickness of the socket. A contact side of the UUT is brought into pressure contact with the tips of the spring probes protruding through a side of the socket. A contact plate connected to the test analyzer is brought into contact with the tips of the spring probes protruding through an opposite side of the socket. The test analyzer transmits high frequency test signals to the contact plate from where the signals are transmitted through the spring probes to the UUT. However, because the spacing between spring probe centers in a socket is limited by the physical dimensions of the spring probes, e.g., the spring probe diameter, this type of test setup cannot be used to test UUTs having contact points whose center spacing is relatively short. Moreover, as the spacing between probes is decreased impedance matching may become infeasible. In order to minimize the effects of impedance mismatch as the spacing between the probes is decreased, the length of the probes must be minimized. It is believed that matched impedance test setups are limited to testing UUTs having contact points whose center spacing is not less than 0.07 inch.
Many prior art fixtures require some mechanical means, such as spring loaded probes, for exerting a compliant force on the pins to ensure proper contact with the test point on the UUTs. The disadvantage of such fixtures is that they have moving parts which are prone to early failure.
The present invention is based on a recognition of a need for a matched impedance interconnect which can be used for testing high frequency UUTs having a contact point center spacing that is less than 0.07 inch. Moreover, the invention is based on a recognition of a need for such a translator fixture which does not incorporate mechanical means such as spring probes for exerting a compliant force on the pins in the translator fixture.
The present invention is directed to a translator fixture or interconnect for testing high frequency or high speed digital circuit boards or unit under test (xe2x80x9cUUT). The invention comprises a translator fixture having a top and a base spaced apart grounded support plates, each plate having pin openings formed through its thickness. In one embodiment, there are four support plates positioned between the top and base plates, although the number may vary. The UUT interfaces with an upper surface of the top plate. The top plate has pin openings corresponding to a set of test points on the UUT. The base plate interfaces with a compliant test interface (or probe field) having an array of spring loaded test probes arranged in a grid or an off-grid pattern. The base plate openings correspond to this spring probe pattern. The probe pattern is typically different from the pattern formed by the set of test points on the UUT. A second circuit board is coupled to the test analyzer and to the compliant test interface.
Coaxial pins are used to provide a signal path from the test analyzer to test points on the UUT which may have centers which are spaced apart at distances of less than 0.07 inch and even less than 0.025 inch. Coaxial pins consist of a signal pin which is surrounded by a shield. The signal pin is separated from the shield by a dielectric material. The shield serves as a ground. The spacing between the signal pin and the shield for each pin used is the same. As a result, each coaxial pin has the same impedance.
The tips of the coaxial pins are ground to a point such that the signal pins extend beyond their corresponding shields. One end of the coaxial pin penetrates the opening on the top plate, while the other end penetrates the opening on the base plate and is in contact with a predetermined spring loaded test probe in the compliant test interface. The spring loaded test probe applies a compliant force against the coaxial pin to ensure a positive contact with the test point on the UUT. Signals from the test analyzer are transferred via the second circuit board through the spring loaded test probes and through the coaxial pins to the test points on the UUT. Ground pins may also used to connect ground points on the UUT with grounded spring loaded test probes in the compliant test interface.
The impedance of the coaxial pins, ground pins, coaxial test probes, UUT, the test analyzer and interfacing circuit board are matched. The impedance of the probes in the compliant test interface is a function of the spacing between adjacent signal and ground probes. The matching of impedances allows the interconnect to be used in testing high frequency or high speed digital circuit boards.
In another embodiment, the translator fixture does not incorporate any spring loaded probes and thus does not interface with a compliant test interface. Rather, the UUT is interfaced with the top plate. A second circuit board, which is coupled to the test analyzer, is interfaced with the bottom plate. Coaxial pins provide the signal path between the second and first circuit boards. During testing, the two circuit boards are moved toward each other, either by applying a vacuum or by mechanical means, causing the coaxial pins to buckle, preferably under Euler buckling. The buckling of the pins causes them to exert a compliant force against the two circuit boards, thereby ensuring a positive contact between the pin and the test points on the UUT and the appropriate points on the second circuit board. The points on the second board may form a grid or an off-grid pattern.
With this embodiment, the top plate is separated from the base plate using two-piece posts. Each two-piece post comprises a first member slidably engaged to a second member. One member is coupled to the top plate and the other member to the base plate. Prior to buckling of the pins, the first member does not span the entire distance between the two plates. A gap exists between the first member and one of the plates. As the two circuit boards are moved toward each other, the pins buckle. Simultaneously, the gap formed between the first member and one of the plates is eliminated. Hence, the initial width of the gap controls the amount of travel between the two circuit boards toward each other, and thus, the amount of bucking of the pins. The spacing between the signal pin and the shield of each coaxial pin remains unchanged even when the coaxial pin is buckled. Consequently, the impedance of the coaxial pins remains constant even when buckled.
By changing the spacing between openings in the compliant test interface or test analyzer circuit, the pins may be tilted sufficiently to provide an interconnect to contact points on the UUT whose centers are spaced apart by a distance of less than 0.07 inch and even less than 0.025 inch. Moreover, because the coaxial pins allow for impedance matching, the interconnects of the present invention can be used to test high frequency UUTs.
These and other aspects of the invention will be more fully understood by referring to the following detailed description and the accompanying drawings.